1. Field of the Invention
The present invention relates to a liquid crystal (hereinbelow, will be referred to as LC) picture image display device which, in particular, permits a picture image display of a high quality.
2. Conventional Art
Hereinbelow, a conventional art will be explained with reference to FIG. 11.
FIG. 11 is a structural diagram of an offset cancel buffer circuit in a low temperate poly-Si drive circuit used for a conventional TFT LC panel drive. An analog input signal Vin is buffered by a negative fed back differential amplifier circuit 155 and is output as an analog output Vout to a TFT LC panel. Two negative feed back routes, one via switch 153 and the other via a switch 152 are provided, and the route via the switch 152 is routed through a capacitor 151. Further, from a junction between the switch 152 and the capacitor 151 a wiring is connected to the input portion Vin via a switch 154.
Now, an operation of the conventional circuit will be explained. Positive and Negative input portions of the differential amplifier circuit 155 are constituted by a low temperature poly-Si TFT, however, since the element characteristics of a low temperature poly-Si TFT generally fluctuate largely in comparison with a single crystal MOS transistor, therefore, if a simple feed back is effected, a large fluctuation in output offset voltage is caused for every buffer circuit in a voltage follower circuit, an uneven brightness in a form of vertical stripes is induced on an LC panel display. Therefore, in the present conventional circuit, in order to cancel the offset voltage, an offset cancel circuit is introduced. During the former half of the horizontal scanning period the switches 153 and 154 are turned on and the switch 152 is turned off. In this instance, an output offset voltage of the differential amplifier circuit 155 with a negative feed back loop is stored in the capacitor 151. Subsequently, during the later half of the horizontal scanning period, the switches 153 and 154 are turned off and the switch 152 is turned on. In a new negative feed back loop produced by this operation the capacitor 151 which stores the output offset voltage is added in series, the output offset voltage is subtracted by the differential amplifier circuit 155. Namely, with thus structured circuit, the output offset voltage can be canceled.
With regard to the above referred to conventional art, for example, Ryuichi Hashido et al. xe2x80x9cAn Offset Cancel Circuit for Integrated Data-Driver Composed of Low-Temperature Poly-Si TFTsxe2x80x9d (TECHNICAL REPORT OF IEICE (THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS) EID 98-125 (1999-01) pp91xcx9c96) explains in details.
Further, with regard to a structure of surrounding circuits when a TFT LC panel is driven while constituting an offset cancel buffer circuit with an LSI, for example, H. Minamizaki et al. xe2x80x9cLow Output Offset, 8 bit Signal Drivers for XGA/SVGA TFT-LCDsxe2x80x9d (Proceedings of Euro Display ""96, pp274xcx9c250) explains in details.
According to the above conventional art, it is possible to cancel the offset voltage due to mismatching in the differential amplifier circuit. However, the inventors found out that the switch 153 (FET (Field Effect Transistor) switch) becomes a new major ground of fluctuation in output offset voltage, and in order to further enhance an output voltage accuracy of the offset cancel circuit the above new major ground has to be resolved which will be explained likely by making use of FIG. 11.
For the sake of the following explanation, it is assumed that the capacity of the capacitance 151 is as Cm and switch feed through charges caused when the switch 153 is turned off are as q1 and q2 as illustrated in the drawing, and further an open gain of the differential amplifier circuit 155 is as G.
At first, the switches 153 and 154 are turned on and after causing to store the output offset voltage of the differential amplifier circuit 151 into the capacitor 151 having capacitance of Cm, the switches 153 and 154 are turned off. It is well known that at this moment the TFTs constituting the respective switches discharge to their sides of source and drain feed through charges. As the result thereof, q1 among the feed through charges of the switch 153 is added to the charge originally stored in the capacitor 151 having the capacitance Cm to modulate the voltage between the capacitor 151. A new offset voltage xcex94Vout which is caused at the output Vout of the offset cancel buffer circuit due to q1 after the above offset cancel operation is determined by the following equation.
xcex94Vout=xe2x88x92q1xc2x7G/(G+1)xc2x7Cmxe2x80x83xe2x80x83(1)
Since the open gain G of the differential amplifier circuit 155 is generally designed in an extremely large value, therefore, if a sufficiently large value is assumed for G in equation (1), it is understand that generation of the offset voltage xcex94Vout determined by (xe2x88x92q1/Cm) due to the feed through charge by the switch 153 can not be avoided. Further, in this instance, the charge q2 caused by the switch 153 affects no important effect.
Since the role of the buffer circuit is an impedance conversion, it is not desirable to design the input impedance small, therefore, the capacity Cm of the capacitor 151 can not be determined too large. Therefore, the new offset voltage xcex94Vout causes a large problem when enhancing the output voltage accuracy of the buffer circuit. If (xe2x88x92q1/Cm) is a constant value, an external correct is possible. However, the problem to be resolved here is the uneven brightness in a form of vertical stripe shape induced in a displayed picture image on the TFT LC panel due to the fluctuation of q1, an external correction thereof is difficult. Hereinbelow, the offset fluctuation due to the above fluctuation in q1 is referred to as xe2x80x9cswitch feed through offset fluctuationxe2x80x9d.
Further, if a single crystalline MOS transistor is used for the switch 153, the threshold voltage Vth thereof generally fluctuates about 20 mV at maximum as well as the gate size thereof is in a degree of submicron. Therefor, the above xe2x80x9cswitch feed through offset fluctuationxe2x80x9d can be suppressed with a capacitor having a comparatively small Cm. However, if, for example, a poly crystalline Si-TFT is used for the switch 153, since a crystal grain structure is included in a channel portion and a defect level density of a gate insulation film boundary is non-uniform, the threshold voltage Vth fluctuates from several 100 mV to about 1V at the maximum. Further, the size of a processed substrate is comparatively large from several 10 cm to 1 m, a minimum processable gate size is a few micron, therefore, the fluctuation in the processed size is comparatively large. The switch feed through charge q1 is primarily proportional to a channel charge Cgxc2x7(Vgxe2x88x92Vth). Wherein Cg is a gate capacitance determined by the gate area, the gate insulation film thickness and the gate insulation film dielectric constant. Accordingly, the fluctuation in the threshold voltage Vth and the gate area as they are directly reflects to the switch feed through charge q1. For example, when it is assumed that the fluctuation in the threshold voltage Vth is 1V, the capacitance ratio between the switch 153 and the capacitor 151 having a capacitance Cm is 100 times and the half of the channel charge of the switch 153 is equivalent to q1, fluctuation of 5 mV at the output is caused when the open gain G of the differential amplifier circuit 155 is approximated to infinite. Actually, fluctuation due to such as fluctuation in processed size of the gate area is added, therefore, along the conventional approach it is difficult to reduce the fluctuation in the output offset voltage of the buffer circuit to a practical level.
In the above, a problem included in the offset cancel circuit due to the switch 153 as shown in FIG. 11 has been explained. However, it should be pointed out that such problem is not an inherent problem with respect to FIG. 11 circuit, but a common problem with regard to a usual offset cancel circuit. An offset cancel circuit operates to apply an offset voltage stored in advance in a capacitor to an input of a differential amplifier circuit to perform subtraction, and for this reason, one end of the capacitor has to be connected to an input of the differential amplifier circuit. Further, in order to write the offset voltage in the capacitor, the one end of the capacitor has also to be connected to the switch. Therefore, the feed through charges caused when the switch is turned off are inherently added to the capacitor, as a result, the feed through charges are applied as an error voltage to the input of the differential amplifier circuit.
According to the above consideration, with the offset cancel buffer circuit using FETs the fluctuation in feed through charge q1 of the offset cancel use switch connected to the input of the differential amplifier circuit induces the new offset voltage fluctuation as referred to as xe2x80x9cswitch feed through offset fluctuationxe2x80x9d and in order to further enhance the output voltage accuracy of the buffer circuit a new counter measure therefor is necessary.
Further, even if the switch 153 which caused the above explained problem of the feed through charges is constituted by such as n type TFT, p type TFT and CMOS TFT, it will be apparent that the same problem is caused in view of the xe2x80x9cfluctuationxe2x80x9d in the feed through charges.
The above problems can be resolved by a picture image display device according to the present invention which comprises a liquid crystal opposing electrode to which a predetermined voltage is applied; a pixel electrode which is provided so as to form a liquid crystal capacitor with the liquid crystal opposing electrode; a pixel switch connected in series with the pixel electrode; a plurality of display pixels arranged in a matrix shape for performing picture image display; a picture image signal voltage generation means which outputs a first analog picture image signal voltage based on picture image data to be displayed; a group of output impedance conversion means using a semiconductor element to which the first analog picture image signal voltage is inputted and which outputs a second analog picture image signal voltage with a lower output impedance than that of the picture image signal voltage generation means; an offset cancel capacitor which is provided in the output impedance conversion means for canceling an output offset fluctuation of the second analog picture image signal voltages due to fluctuation of the semiconductor characteristic in the group of the respective output impedance conversion means and of which one terminal is connected to a voltage input terminal of the output impedance conversion means; an offset cancel circuit group which includes a first semiconductor switch of which one terminal is connected likely to the voltage input terminal of the output impedance conversion means; a signal line group which connects output terminals of the output impedance conversion means in group with the pixel switches in group; and a signal voltage writing means which writes the second analog picture image signal voltage representing the outputs of the output impedance conversion means in group via the signal lines in group and the pixel switches in group into a liquid crystal capacitor in a predetermined display pixel; and is further newly provided with means for reducing an output fluctuation in the second analog picture image signal voltage due to fluctuation in feed through charges caused when the first semiconductor switch is turned off.